1. Field of the Invention
This invention relates to a device and a manufacturing method thereof, and particularly to a semiconductor device having a three-dimensional capacitor and a manufacturing method thereof.
2. Description of the Related Art
In order to achieve further integration of semiconductor devices, it is necessary to further reduce the size of electric and electronic elements included therein. However, if a capacitor in a DRAM (Dynamic Random Access Memory) which is a type of semiconductor device is reduced in size for the purpose of reduction of the memory cell size, the capacity thereof will also be reduced, causing a problem of unstable operation. To avoid such a problem, three-dimensional capacitors have been developed as a measure to allow the capacitor to have a required capacity while reducing the area occupied by the memory cells (memory cell area). Such a capacitor is described, for example, in Japanese Laid-Open Patent Publication No. H4-25171 (Patent Document 1).
A related three-dimensional capacitor is fabricated by forming a silicon oxide film which can be formed thick relatively easily, forming a hole in the silicon oxide film, and forming a storage electrode on the inner wall of the hole. This capacitor structure is also called the concave-type capacitor structure.
Formation of a hole to form a concave-type capacitor therein is carried out, for example, by using a photolithography technique to form a hole pattern on a photoresist and dry-etching the silicon oxide film using as mask the photoresist having the hole pattern formed thereon. This type of techniques is described, for example, in Japanese Laid-Open Patent Publication No. 2000-150826 (Patent Document 2), or Japanese Laid-Open Patent Publication No. 2001-189434 (Patent Document 3).